1. Technical Field
Various embodiments generally relate to a repair device, and more particularly, to a technology for utilizing cells of dummy mats as redundancies.
2. Related Art
A DRAM (dynamic random access memory) is constructed by a plurality of memory cells. The memory cells are arranged in the form of a matrix. If a fail occurs even in one of the memory cells among a plurality of memory cells, a semiconductor memory device is identified as a bad product since it cannot properly perform an operation. The probability of a failed cell occurring increases with semiconductor memory devices having high integration and performing high speed operations.
Therefore, a yield is likely to decrease. The yield may be defined as the ratio of the number of good chips to the total number of chips and serves to determine a manufacturing cost. Thus, studies are actively being made for not only a method for high integration and high speed operation of a semiconductor memory device but also a method for efficiently repairing a failed cell in an effort to increase a yield.
As a method for repairing a failed cell, a technology of disposing a repair circuit for replacing a failed cell with a redundancy cell is being used. In general, a repair circuit includes redundancy columns/rows which are arranged into columns and rows each constructed by redundancy memory cells. A redundancy column/row is selected instead of a column/row in which a fail has occurred.
That is to say, if a row and/or column address signal which designates a failed cell is inputted, a redundancy column/row is selected instead of a failed column/row of a normal memory cell bank or memory cell bank which has not failed.
Generally, in order to represent an address which designates a failed cell, a plurality of fuses to be cut are disposed. The address of the failed cell is programmed as the plurality of fuses are selectively cut.